SPT1018 8-bit, high speed d/a converter signal processing technologies, inc. 4755 forge road, colorado springs, colorado 80907, usa phone: (719) 528-2300 fax: (719) 528-2370 sync, blank, bright, ref - high d0 - d3 d4 - d7 (msbs) 4 to 15 decode output current switches out + out - video controls in video data in feedthrough convert ref+ ref- video data in 4 4 4 4 2 4 ref buffer register comp features ? 275 mwps conversion rate - version a ? 165 mwps conversion rate - version b ? compatible with tdc1018 and hdac10180 with improved performance ? rs-343-a compatible ? complete video controls: sync, blank, bright and reference white (force high) ? 10kh, 100k ecl compatible ? single power supply ? registered data and video controls ? differential current outputs ? esd protected data and control inputs applications ? high resolution color or monochrome raster graphics displays ? medical electronics: cat, pet, mr imaging displays ? cad/cae workstations ? solids modeling ? general purpose high-speed d/a conversion ? digital synthesizers ? automated test equipment ? digital transmitters/modulators general description the SPT1018 is a monolithic 8-bit digital-to-analog converter capable of accepting video data at a 165 or 275 mwps rate. complete with video controls (sync, blank, reference white [force high], bright), the SPT1018 directly drives doubly- terminated 50 or 75 ohm loads to standard composite video levels. the standard set-up level is 7.5 ire. the SPT1018 is pin-compatible with the hdac10180 and the tdc1018, with improved performance. the SPT1018 contains data and control input registers, video control logic, reference buffer, and current switches. the SPT1018 is available in a 24-lead pdip package in the industrial temperature range. contact the factory for military temperature and /883 versions. block diagram
spt 2 5/14/97 SPT1018 absolute maximum rating (beyond which damage may occur) 1 supply voltages v ee (measured to v cc ) ............................... -7.0 to 0.5 v input voltages conv, data, and controls .......................... v ee to 0.5 v (measured to v cc ) ref+ (measured to v cc ) .............................. v ee to 0.5 v ref- (measured to v cc ) ............................... v ee to 0.5 v temperature operating, ambient ................................ -25 to +85 c junction ......................................... +175 c lead, soldering (10 seconds) ............................. +300 c storage ..................................................... -60 to +150 c note : 1. operation at any absolute maximum ratings is not implied. see electrical specifications for proper nominal applied conditions in typical applications. electrical specifications v cc =ground, v ee = -5.2 v 0.3 v, t a =t min to t max , c c = 0 pf, i set = 1.105 ma, unless otherwise specified. test test parameters conditions level min typ max units dc electrical characteristics integral linearity error 1.0 ma spt 3 5/14/97 SPT1018 electrical specifications v cc =ground, v ee = -5.2 v 0.3 v, t a =t min to t max , c c = 0 pf, i set = 1.105 ma, unless otherwise specified. test parameters conditions level min typ max units dc electrical characteristics input capacitance, v 3.0 pf data and controls power supply sensitivity vi -120 20 +120 m a/v supply current vi 155 220 ma dynamic characteristics ( r l = 37.5 ohms, c l = 5 pf, t a = 25 c, i set = 1.105 ma) maximum conversion rate b grade iv 165 mwps a grade iv 275 mwps rise time 10% to 90% g.s. iv 1.6 ns t a = t min to t max iv 2.0 ns rise time 10% to 90% g.s. v 1.0 ns r l = 25 ohms current settling time, clocked mode to 0.2% g.s. v 7.0 ns current settling time, clocked mode to 0.8% g.s. v 5.5 ns current settling time, clocked mode to 0.2% g.s. v 4.5 ns t si r l = 25 w clock to output delay, clocked mode iv 2.2 4.0 ns t dsc t a = t min to t max iv 4.5 ns data to output delay, iv 3.2 6.0 ns transparent mode t dst t a = t min to t max iv 6.0 ns convert pulse width, ( low or high) b grade iv 3.0 ns t pwl , t pwh a grade iv 1.8 ns glitch energy area = 1/2 vt v 4 pv-s reference bandwidth, -3 db v 1.0 mhz set-up time, data and controls iv 1.0 ns t s t a = t min to t max iv 1.0 ns hold time, data and controls iv 0.5 ns t h t a = t min to t max iv 0.5 ns slew rate 20% to 80% g.s. iv 390 v/ m s t a = t min to t max iv 325 v/ m s clock feedthrough iv -48 db t a = t min to t max iv -48 db test level codes all electrical characteristics are subject to the following conditions: all parameters having min/ max specifications are guaranteed. the test level column indicates the specific device test- ing actually performed during production and quality assurance inspection. any blank sec- tion in the data column indicates that the speci- fication is not tested at the specified condition. test level i ii iii iv v vi test procedure 100% production tested at the specified temperature. 100% production tested at t a = +25 c, and sample tested at the specified temperatures. qa sample tested only at the specified temperatures. parameter is guaranteed (but not tested) by design and characterization data. parameter is a typical value for information purposes only. 100% production tested at t a = +25 c. parameter is guaranteed over specified temperature range.
spt 4 5/14/97 SPT1018 figure 1 - functional diagram application information the SPT1018 is a high speed video digital-to-analog con- verter capable of conversion rates of up to 275 mwps. this makes the device suitable for driving 1500 x 1800 pixel displays at 70 to 90 hz update rates. the SPT1018 is separated into different conversion rate categories as shown in table i. the SPT1018 has 10 kh and 100k ecl logic level compat- ible video controls and data inputs. the complementary analog output currents produced by the devices are propor- tional to the product of the digital control and data inputs in conjunction with the analog reference current. the SPT1018 is segmented so that the four msbs of the input data are separated into a parallel thermometer code. from here, fifteen identical current sinks are driven to fabricate sixteen coarse output levels. the remaining four lsbs drive four binary weighted current switches. the msb currents are then summed with the lsbs, which provide a one-sixteenth of full scale contribution, to provide the 256 distinct analog output levels. the video control inputs drive weighted current sinks that are added to the output current to produce composite video output levels. these controls, sync, blank, reference white (force high), and bright are needed in video applications. another feature that similar video d/a converters do not have is the feedthrough control. this pin allows registered or unregistered operation of the video control and data inputs. in the registered mode, the composite functions are latched to the pixel data to prevent screen-edge distortions generally found on unregistered video dacs. 4 decoding logic data registers current sources and switches current source biasing amp +- out + out - 8 composite video controls feedthrough d0 - d7 2 conv conv ref+ v ee v cc ref- table i - the SPT1018 family and speed designations part number update comments SPT1018a 275 mwps suitable for 1200 x 1500 to 1500 x 1800 displays at 60 to 90 hz update rate. SPT1018b 165 mwps suitable for 1024 x 1280 to 1200 x 1500 displays at 60 to 90 hz update rate.
spt 5 5/14/97 SPT1018 r 2 750 w output current switches 4 to 15 decode video control inputs video data inputs clock 4 4 ) ( ref buffer v+ r 1 500 w i set i set * v- 1 k w ?5.2 v .01 f lm113/313 ft fh blank brt sync d0 (lsb) d1 d2 d3 d4 d5 d6 d7 (msb) conv conv 2 k w register video monitor out+ r 3 50/75 w r 4 50/75 w 50/75 w coax notes: out- ref+ ref- v- = -1.2 v (typical) for lm113. v+ = -1.2 v r l = r3 / / r4 k = 15.8069 k 1 = 1.7617 k 2 = 10.0392 fb = ferrite bead, fair-rite p/n 217430011 or equivalent. = ecl termination x i set = v+ a t(r 1 +r 2 ) v sync = (k x i set x r l ) + (k 2 x i set x r l ) all reference resistors 1/8 w 1% metal film power supply decoupling 50 v ceramic disc. 255-digital?nput?ode v out - = ? 255 ?? set r l + [] k i x i set ?? l ?bright) ? k = v cc = agnd see figure 8 for detail on ref buffer. v ee v cc comp -5.2 v .01 f 10 f fb 1. 2. 3. 4. 6. 7. 8. 9. 5. 10. 11. 10. = dgnd (digital input drivers). figure 2 - typical interface circuit typical interface circuit general a typical interface circuit using the SPT1018 in a color raster application is shown in figure 2. the SPT1018 requires few external components and is extremely easy to use. the very high operating speeds of the SPT1018 require good circuit layout, decoupling of supplies, and proper design of trans- mission lines. the following considerations should be noted to achieve best performance. input considerations video input data and controls may be directly connected to the SPT1018. note that all ecl inputs are terminated as closely to the device as possible to reduce ringing, crosstalk and reflections. a convenient and commonly used microstrip impedance is about 130 ohms, which is easily terminated using a 330 ohm resistor to v ee and a 220 ohm resistor to ground. this arrangement gives a thevenin equivalent ter- mination of 130 ohms to -2 volts without the need for a -2 volt supply. standard sip (single inline package) 220/330 resistor networks are available for this purpose. it is recom- mended that stripline or microstrip techniques be used for all ecl interface. printed circuit wiring of known impedance over a solid ground plane is recommended. output considerations the analog outputs are designed to directly drive a dual 50 or 75 ohm load transmission system as shown. the source impedances of the SPT1018 outputs are high impedance current sinks. the load impedance (r l ) must be 25 or 37.5 ohms to attain standard rs-343-a video levels. any deviation from this impedance will affect the resulting video output levels proportionally. as with the data interface, it is important that the analog transmission lines have matched impedance throughout, including connectors and transitions between printed wiring and coaxial cable. the combination of matched source termination resistor r s and load terminator r l minimizes reflections of both forward and reverse travel- ing waves in the analog transmission system. the return path for analog output current is v cc which is connected to the source termination resistor r s .
spt 6 5/14/97 SPT1018 power considerations the SPT1018 operates from a single -5.2 v standard supply. proper bypassing of the supplies will augment the SPT1018s inherent supply noise rejection characteristics. as shown in figure 2, each supply pin should be bypassed as close to the device as possible with 0.01 m f and 10 m f capacitors. the SPT1018 has two analog (v ee ) power supply pins. both supply pins should be properly bypassed as mentioned previously. this device also has two analog (v cc ) ground pins. both ground pins should be tied to the analog ground plane. power and ground pins must be connected in all applications. if a +5 v power source is required, the ground pins (v cc ) become the positive supply pins while the supply pins (v ee ) become the ground pins. the relative polarities of the other input and output voltages must be maintained. reference considerations the SPT1018 has two reference inputs: ref+ and ref-. these pins are connected to the inverting and noninverting inputs of an internal amplifier that serves as a reference buffer amplifier. the output of the buffer amplifier is the reference for the current sinks. the amplifier feedback loop is connected around one of the current sinks to achieve better accuracy. (see figure 8.) since the analog output currents are proportional to the digital input data and the reference current (i set ), the full-scale output may be adjusted by varying the reference current. i set is controlled through the ref+ input on the SPT1018. a method and equations to set i set is shown in figure 2. the SPT1018 uses an external negative voltage reference. the external reference must be stable to achieve a satisfactory output and the ref- pin should be driven through a resistor to minimize offsets caused by bias current. the value for i set can be varied with the 500 ohm trimmer to change the full scale output. a double 50 ohm load (25 ohm) can be driven if i set is increased 50% more than i set for doubly terminated 75 ohm video applications. compensation the SPT1018 provides an external compensation input (comp) for the reference buffer amplifier. in order to use this pin correctly, a capacitor should be connected between comp and v ee as shown in figure 2. keep the lead lengths as short as possible. if the reference is to be kept as a constant, use a large capacitor (.01 m f). the value of the capacitor determines the bandwidth of the amplifier. if modu- lation of the reference is required, smaller values of capaci- tance can be used to achieve up to a 1 mhz bandwidth. data inputs and video controls the SPT1018 has standard single-ended data inputs. the inputs are registered to produce the lowest differential data propagation delay (skew) to minimize glitching. there are also four video control inputs to generate composite video outputs. these are sync, blank, bright and reference white or force high. also provided is the feedthrough control as mentioned earlier. the controls and data inputs are all 10 kh and 100k ecl compatible. in addition, all have internal pulldown resistors to leave them at a logic low so the pins are inactive when not used. this is useful if the devices are applied as standard dacs without the need for video controls or if less than eight bits are used. -1.3 v conv conv 1/2 lsb t pwl t h t s t pwh aaaaaa aaaaaa aaa t si out + out - 1/2 lsb -1.3 v t dsc t dst data control inputs figure 3 - timing diagram
spt 7 5/14/97 SPT1018 table ii - video control operation (output values for set-up = 10 ire and 75 ohm standard load) sync blank ref white bright data input out - (ma) out - (v) out - (ire) description 1 x x x x 28.57 -1.071 -40 sync level 0 1 x x x 20.83 -0.781 0 blank level 0 0 1 1 x 0.00 0.000 110 enhanced high level 0 0 1 0 x 1.95 -0.073 100 normal high level 0 0 0 0 000... 19.40 -0.728 7.5 normal low level 0 0 0 0 111... 1.95 -0.073 100 normal high level 0 0 0 1 000... 17.44 -0.654 17.5 enhanced low level 0 0 0 1 111... 0.00 0.000 110 enhanced high level the SPT1018 is usually configured in the synchronous mode. in this mode, the controls and data are synchronized to prevent pixel dropout. this reduces screen-edge distor- tions and provides the lowest output noise while maintaining the highest conversion rate. by leaving the feedthrough (ft) control open (low), each rising edge of the convert (conv) clock latches decoded data and control values into a d-type internal register. the registered data is then converted into the appropriate analog output by the switched current sinks. when ft is tied high, the control inputs and data are not registered. the analog output asynchronously tracks the input data and video controls. feedthrough itself is asynchro- nous and usually used as a dc control. the controls and data have to be present at the input pins for a set-up time of t s before, and a hold time of t h after, the rising edge of the clock (conv) in order to be synchronously registered. the set-up and hold times are not important in the asynchronous mode. the minimum pulse widths high (t pwh ) and low (t pwl ) as well as settling time become the limiting factors. (see figure 3.) the video controls produce the output levels needed for horizontal blanking, frame synchronization, etc., to be com- patible with video system standards as described in rs-343-a. table ii shows the video control effects on the analog output. internal logic governs blank, sync, and force high so that they override the data inputs as needed in video applications. sync overrides both the data and other controls to produce full negative video output (figure 9). reference white video level output is provided by force high, which drives the internal digital data to full scale output or 100 ire units. bright gives an additional 10% of full scale value to the output level. this function can be used in graphic displays for highlighting menus, cursors or warning mes- sages. again, if the devices are used in non-video applica- tions, the video controls can be left open. convert clock for best performance, the clock should be ecl driven, differentially, by utilizing conv and conv (figure 4). by driving the clock this way, clock noise and power supply/ output intermodulation will be minimized. the rising edge of the clock synchronizes the data and control inputs to the SPT1018. since the actual switching threshold of conv is determined by conv, the clock can be driven single-ended by connecting a bias voltage to conv . the switching thresh- old of conv is set by this bias voltage. analog outputs the SPT1018 has two analog outputs that are high imped- ance, complementary current sinks. the outputs vary in proportion to the input data, controls and reference current values so that the full scale output can be changed by setting i set as mentioned earlier. in video applications, the outputs can drive a doubly termi- nated 50 or 75 ohm load to standard video levels. in the standard configuration of figure 5, the output voltage is the product of the output current and load impedance and is between 0 and -1.07 v. the out- output (figure 9) will provide a video output waveform with the sync pulse bottom at the -1.07 v level. the out+ is inverted with sync up.
spt 8 5/14/97 SPT1018 figure 4 - convert, convert switching levels v idf v icm max 0.0 v -1.3 v conv conv v icm min figure 5a - standard load out + video monitor inverse video out- r l 75 w 75 w coax r s 75 w r l 75 w 75 w coax r s 75 w SPT1018 figure 5b - test load video out 0 to -1 volt out + out - r l 37.5 c l <5 pf typical rgb graphics system in an rgb graphics system, the color displayed is determined by the combined intensities of the red, green and blue (rgb) d/a converter outputs. a change in gain or offset in any of the rgb outputs will affect the apparent hue displayed on the crt screen. thus, it is very important that the outputs of the d/a convert- ers track each other over a wide range of operating condi- tions. since the d/a output is proportional to the product of the reference and digital input code, a common reference should be used to drive all three d/as in an rgb system to minimize rgb dac-to-dac mismatch and improve tc tracking. the spt1019 contains an internal precision bandgap refer- ence which completely eliminates the need for an external reference. the reference can supply up to 50 m a to an external load, such as two other dac reference inputs. (see the spt1019 data sheet). the circuits shown in figure 6 illustrate how a single spt1019 may be used as a master reference in a system with multiple dacs (such as rgb). the other dacs are simply slaved from the spt1019s reference output. the SPT1018s shown are especially well-suited to be slaved to a spt1019 for a better tc tracking from dac-to-dac, since they are essentially spt1019s without the reference. the SPT1018 is pin-com- patible with the tdc1018, that does not have an internal reference. although either the tdc1018 or the SPT1018 may be slaved from an spt1019, the higher performance SPT1018 and the above mentioned dac-to-dac tc track- ing is the best choice for new designs. no external reference is required for operation of the spt1019, as this function is provided internally. the internal reference is a bandgap type and is suitable for operation over extended temperature ranges. the SPT1018 must use an external reference. figure 6 - typical rgb graphics system ref- ref+ 750 w 500 w 750 w 500 w r g 1 k w ref- ref+ b 1 k w ref out i set r 2 750 w r 1 500 w i ref i set i set i set spt1019 (master) SPT1018 (slave) SPT1018 (slave) figure 7 - burn-in circuit conv 1 k w 100 w 6.5 w -1.2 v (max 1.5 ma) 1 k w 24 pin dip all resistors are 5% 1/4 w cc clock = -0.9 to -1.7 v, 100 khz ref+ conv 1 k w v cc clock (max 60 a) -5.9 v (max 200 ma) (max 50 ma) out- ref- v ee out+ -1.3 v (max 60 a) 1 k w 6.5 w 100 w (max 50 ma) (max 1.5 ma)
spt 9 5/14/97 SPT1018 figure 9 - video output waveform for standard load figure 10 - equivalent input circuits - data, clock, controls and reference i bias v ee conv conv i bias v ee v cc reference segment switch ref- ref+ i bias i bias 80 k w i bias v ee v data and controls 256 gray levels normal low (black) sync video blank bright normal high (white) 110 100 7.5 0 -40 ire 0 mv -73 mv -728 mv -781 mv -1071 mv i seg out+ out- v ee i seg current sink #1 current sink #n reference amplifier ref- ref+ + - reference current comp figure 8 - dac output circuit
spt 10 5/14/97 SPT1018 package outline 24-lead pdip a b c d e 1 24 f g h k i j inches millimeters symbol min max min max a b c d e f g h i j 0.190 0.135 0.022 0.012 0.550 1.255 k 0.125 0.015 0.100 typ 0.055 0.008 0.150 typ 0.600 0.530 1.245 0.070 3.18 0.38 2.54 typ 1.40 0.20 3.81 typ 15.24 13.46 31.62 1.78 4.83 3.43 0.56 1.65 0.30 15.88 13.97 31.88 2.03 0.065 0.625 0.080
spt 11 5/14/97 SPT1018 ordering information part number description temperature range package SPT1018ain 8-bit, 275 mwps dac -25 to +85 c 24l pdip SPT1018bin 8-bit, 165 mwps dac -25 to +85 c 24l pdip pin assignments pin functions name function d3 data bit 3 d2 data bit 2 d1 data bit 1 d0 data bit 0 (lsb) v ee negative supply conv convert clock input conv convert clock input complement ft register feedthrough control v cc positive supply fh data force high control blank video blank input brt video bright input sync video sync input ref- reference current - input ref+ reference current + input comp compensation input out- output current negative out+ output current positive d7 data bit 7 (msb) d6 data bit 6 d5 data bit 5 d4 data bit 4 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 d4 d5 d6 d7 v out + out - v cc ref- sync ee d3 d2 d1 d0 v ee conv ft v cc fh blank brt conv comp ref+ pdip signal processing technologies, inc. reserves the right to change products and specifications without notice. permission is hereby expressly granted to copy this literature for informational purposes only. copying this material for any other use is strictly prohibited. warning - life support applications policy - spt products should not be used within life support systems without the specific written consent of spt. a life support system is a product or system intended to support or sustain life which, if it fails, can be reasonably expected to result in significant personal injury or death. signal processing technologies believes that ultrasonic cleaning of its products may damage the wire bonding, leading to device failure. it is therefore not recommended, and exposure of a device to such a process will void the product warranty.
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